The Fifth Berkeley Symposium on Energy Efficient Electronic Systems and Steep Transistors Workshop will take place on October 19-20, 2017 in the Sutardja Dai Hall, University of California, Berkeley, California, USA.

The Berkeley Symposium on Energy Efficient Electronic Systems was established in 2009 with the goal of bringing together researchers from around the world working on breakthroughs in next generation low-energy information processing systems. This year, the Berkeley Symposium will join forces with the Steep Transistors Workshop with the goal of further expanding its reach and impact. The joint event will present a unique forum for speakers, from academia, industry, and government laboratories, to share their perspectives, discuss issues, and present new approaches.

This year’s joint two-day event will include keynote presentations, invited and contributed talks, as well as two poster sessions with “mini-talks”. This structure will enable all attendees a better understanding the challenges and opportunities in low-energy information processing systems, extending from new low-power nanoelectronic devices, through circuit design, chip-scale architecture, short-range interconnects, long-range interconnect, networks, software, storage systems, servers data centers and supercomputers.

Two members of the E2SWITCH consortium, Adrian Ionescu (EPFL, E2SWITCH coordinator) and Lars-Erik Wernersson (Lund university, E2SWITCH dissemination manager) are part of the 2017 Organizing committee and will be happy to discuss your contributions.

Deadline for abstract submission is Sunday, July 2, 2017.

The paper submission deadline for the 2017 edition of the ESSDERC-ESSCIRC conference  (Leuven, 11-14 Sep 2017) is fast approaching: it's 10 April 2017.

For details about the conference, paper submission, keynore speakers, venue and accommodation and miuch more, please refer to the conference website. 

We are very pleased to inform that E2SWITCH researchers from EPFL and JUELICH have just  published project results in Nature:

A Steep-Slope Transistor Combining Phase-Change and Band-to-Band-Tunneling to Achieve a sub-Unity Body Factor

by Wolfgang A. Vitale, Emanuele A. Casu, Arnab Biswas, Teodor Rosca, Cem Alper, Anna Krammer, Gia V. Luong, Qing-T. Zhao, Siegfried Mantl, Andreas Schüler & A. M. Ionescu

Abstract
Steep-slope transistors allow to scale down the supply voltage and the energy per computed bit of information as compared to conventional field-effect transistors (FETs), due to their sub-60 mV/decade subthreshold swing at room temperature. Currently pursued approaches to achieve such a subthermionic subthreshold swing consist in alternative carrier injection mechanisms, like quantum mechanical band-to-band tunneling (BTBT) in Tunnel FETs or abrupt phase-change in metal-insulator transition (MIT) devices. The strengths of the BTBT and MIT have been combined in a hybrid device architecture called phase-change tunnel FET (PC-TFET), in which the abrupt MIT in vanadium dioxide (VO2) lowers the subthreshold swing of strained-silicon nanowire TFETs. In this work, we demonstrate that the principle underlying the low swing in the PC-TFET relates to a sub-unity body factor achieved by an internal differential gate voltage amplification. We study the effect of temperature on the switching ratio and the swing of the PC-TFET, reporting values as low as 4.0 mV/decade at 25 °C, 7.8 mV/decade at 45 °C. We discuss how the unique characteristics of the PC-TFET open new perspectives, beyond FETs and other steep-slope transistors, for low power electronics, analog circuits and neuromorphic computing.

The TFET work of E2SWITCH partner Lund University was nominated for the Compound Industry Awards 2017 (innovation award).

MOSFET scaling has for several decades been the main path to increase the performance of Si CMOS technology. As a result, the transistor density in the circuits has steadily increased. Since the subthreshold swing (S) for a thermionic device does not scale below 60 mV/dec., this has resulted in increased power density, which has become the main limitation.

To achieve voltage scaling without off-current increase, there is a need for devices with a subthreshold swing lower than 60mV/dec. These are so called steep slope devices, of which the Tunneling Field-Effect Transistor (TFET) is the most promising candidate [1-2]. The TFET operation rely on tunneling-based energy filtering that prevents electrons with high thermal energy to enter the channel thereby enabling sub-60 mV/dec. subthreshold swing. So far, few reports exist of TFETs with S below 60 mV/dec. usually with current levels far below any useful operation range [3-8].

Lund university presents a vertical nanowire InAs/GaAsSb/GaSb heterojunction TFET integrated on a Si substrate with Smin = 48 mV/dec. with I60 = 0.31 μA/μm at VDS = 0.3 V and IDS = 10.6 μA/μm for Ioff = 1nA/um at VDS = 0.3 V. The device achieves an intrinsic gain of 2400 and a transconductance efficiency of 50 V-1. Our novel heterostructure design enabled by the reduced constraint for lattice matching in the bottom up nanowire growth in combination with aggressively scaled dimensions and a gateall-around geometry demonstrate that III-V TFETs are viable alternative both for low-power logic and analog applications.

[1] A.C. Seabaugh, Q. Zhang, Proc. IEEE, Vol. 98, No. 12, pp. 2095–2110, 2010
[2] A. M. Ionescu, H. Riel, Nature, Vol. 479, No. 7373, pp. 329–337, 2011
[3] Q. Huang et. al., in Electron Devices Meeting (IEDM), 2012 IEEE International, pp. 8.5.1 – 8.5.4
[4] L. Knoll et. al., Electron Device Letters, IEEE, Vol. 34, no. 6, pp. 813 – 815, 2013
[5] S. H. Kim et. al., in Proc. VLSI Symp.Tech. Dig., 2012, pp. 178-179
[6] K. Tomioka et. al., in Proc. VLSI Symp.Tech. Dig., 2012, pp. 47-48
[7] T. Krishnamohan et. al., in Electron Devices Meeting (IEDM), 2008 IEEE International, pp. 947 – 949
[8] G. Dewey et. al., in Electron Devices Meeting (IEDM), 2011 IEEE International, pp. 33.6.1–33.6.4

The E2SWITCH from Lund University, Sweden has presently three open PhD positions and is looking for suitable candidates.

The research within the Nanoelectronics group at Lund University focuses on science and technology for emerging ICT applications. Their efforts build on knowledge in nanotechnology that are combined with conventional top-down device processing for post Si CMOS applications. The group has extensive collaborations related to, for instance, antenna design, communication technologies, surface science and transport physics that they combine with their key competence in device technology.

The PhD positions aim at fabrication of III-V MOSFETs and III-V MOSFET low-power circuits in nanowire/FinFET geometries. A particular focus will be on the development of device technology to meet circuit specifications. The research will primarily involve device and circuit fabrication as well as materials evaluation. The positions may involve a combination of experimental and theoretical work.

Last application date: 2017-03-15
Contact: Prof. Lars-Erik Wernersson, +46-46-2229003, lars-erik.wernersson@eit.lth.se

More information can be found here.

Researchers at ETH Zurich are using America's fastest supercomputer to make huge gains in understanding the smallest electronic devices.

The team, led by E2SWITCH member Mathieu Luisier, focuses on further developing the front line of electronics research - simulating and better understanding nanoscale components such as transistors or battery electrodes whose active regions can be on the order of one-billionth of a meter, or about as long as your fingernails grow in one second.

Though the scales of the investigated objects are small, the team has made big progress toward more efficient computational codes. Its research was selected as a finalist for this year's Association of Computing Machinery's Gordon Bell Prize, one of the most prestigious awards in supercomputing.
The team's award submission is a result of research conducted on the Oak Ridge Leadership Computing Facility's Cray XK7 Titan supercomputer. The OLCF is a U.S. Department of Energy Office of Science User Facility located at Oak Ridge National Laboratory.

Laptops, cell phones and other electronic devices are becoming cheaper and more accessible while also becoming increasingly sophisticated. These advancements are largely because of the ever-shrinking dimensions of their electronic components.

However, developing next-generation hardware now requires scientists and engineers to understand material interactions at extremely small time- and size scales, leading researchers to augment experiment with simulation.

"Our goal is to study nanoscale devices, such as nanotransistors, batteries or a variety of other new devices such as computer memories, optical switches or light emitting diodes on an atomic level," Luisier said. "If you want to make these simulations accurate and truly predictive, you need to use so-called ab initio, or from first principles, simulation methods."

The full article can be found on the nanowerk website. 

Based on the E²SWITCH results and dissemination activities so far, we have prepared “Output pages" for the project's website. To start with, you’ll find there:

- a video introduction to the project
- the first press release
- a project flyer
- the list of publications
- a summary and all presentations of the first workshop @ESSDERC
- results based on the publishable summary of year 1

Enjoy browsing!

The publication of the project's first press release on the 25th of September 2014 coincides with the first workshop of the project to be held at the 44th European Solid-State Device Conference (ESSDERC 2014) on September 26, in Venice, Italy.

The electronic version of the press release is available in French and English on the EPFL website.